The Sparse Synchronous Model

Date

Apr 25, 2024 - Apr 26, 2024

Time

9:30 AM - 9:30 AM

Speaker

Stephen A. Edwards

Affiliation

Computer Science Department, Columbia University, USA

Language

en

Main Topic

Informatik

Description

<p>Most software considers timing a performance issue, but for many<br>embedded applications, the timing of a result is as important as its<br>value. Most modern computers do have precise hardware timers, but<br>they are not easily used to make a whole system timing-aware.<br><br>To address this, we developed the Sparse Synchronous Model: a<br>deterministic, concurrent, timing-aware approach to specifying<br>software. A kind of real-time discrete event simulation, we describe<br>its semantics and implementations, including as an awkward-to-use C<br>library, as an embedded language in Haskell, as a novel functional<br>language, and as a Lua library. We also describe our RP2040<br>microcontroller runtime system that provides software with an<br>unheard-of timing resolution of 62.5 nanoseconds.<br><br></p>

Last modified: Apr 25, 2024, 7:36:22 AM